1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same and more particularly to the semiconductor device having a capacitor of MIM (Metal Insulator Metal) structure and the method for manufacturing the same.
2. Description of the Related Art
An LSI (Large Scale Integrated Circuit) being known as a typical semiconductor device is roughly classified into two, one being a memory device and another being a logic device and, as semiconductor manufacturing technology advances in recent years, progress of the memory device in particular is remarkable. Moreover, the memory device is also classified into two, one being a DRAM (Dynamic Random Access Memory) and another being an SRAM (Static Random Access Memory) and most of these memory devices are made up of a MOS (Metal Oxide Semiconductor)-type transistor because it is excellent in points of integration degree. In the case of the DRAM in particular, since the merit of high integration as mentioned above can be exploited more when compared with the SRAM, manufacturing costs of DRAMs can be reduced and, therefore, the DRAM is widely used in various kinds of memory devices such as information devices or a like. Moreover, an embedded DRAM in which the DRAM and logic device are integrally formed on same one chip is becoming widespread recently.
One memory cell of a DRAM is made up of a memory selecting transistor constructed of a MOS-type transistor to perform switching operations and of a capacitor being connected to the memory selecting transistor and stores information depending on presence or absence of a charge of the capacitor. Here, as information to be stored increases due to progress of recent information society, a limitation is imposed on an area that can be occupied by the capacitor formed on a semiconductor chip and, therefore, contrivance to increase capacity of the capacitor in each memory cell is needed. If the capacitor does not have sufficient capacity enough to store information, charges of the capacitor decrease due to influences by extrinsic noise signals or a like, thus causing occurrence of a malfunction such an error as typified by a soft error.
Conventionally, as a capacitor insulating film for a capacitor in a DRAM, a silicon oxide (SiO2) film, a silicon nitride (SiN) film, a silicon nitride oxide (SiON) film obtained by combining the above two films, or a like are widely used, however, in order to ensure more larger capacity, there is a recent tendency that a metal oxide film having a relative dielectric constant (relative permittivity) being higher than that of such the insulating films as described above is employed. Moreover, as a lower electrode (storage electrode) and an upper electrode (plate electrode) which make up a capacitor by being combined with the capacitor insulating film, a polycrystalline silicon film is used which can be formed easily by deposition in a manufacturing process of a MOS-type transistor. However, in general, a polycrystalline silicon film is manufactured by a CVD (Chemical Vapor Deposition) method which includes a high temperature process at time of deposition and during a thermal process of activating impurities in films subsequent to the deposition process, and there is a fear that, during the high temperature thermal process, a MOS transistor making up the memory selecting transistor or logic device or a like as described above already formed in a semiconductor substrate is thermally affected and deteriorated. Therefore, a capacitor of, so-called MIM structure is employed in which a metal being able to be deposited at a temperature being so low that it does not exert a thermal influence on the MOS transistor is used as a material for the lower electrode and upper electrode described above.
A semiconductor device having a capacitor using an amorphous aluminum oxide (Al2O3) film as a capacitor insulating film of such the capacitor as described above is disclosed in, for example, Japanese Patent Application Laid-open No. Hei11-233726.
The capacitor of the conventional semiconductor device, as shown in FIG. 7, includes a lower electrode 200 made up of, for example, a polycrystalline silicon film so formed as to be connected to an active region through a contact hole formed in an interlayer insulating film (interlayer dielectric) which covers a semi-conductor substrate 100 having the active region, a capacitor insulating film 400 made up of an amorphous aluminum oxide which covers the lower electrode 200, an upper electrode 500 made up of, for example, a polycrystalline silicon film which covers the capacitor insulating film 400, and a reaction preventing film 300 made up of, for example, a silicon nitride film formed between the lower electrode 200 and capacitor insulating film 400 which is formed if necessary. The amorphous aluminum oxide film making up the capacitor insulating film 400 is deposited by, for example, an ALD (Atomic Layer Deposition) method so as to have a desired thickness. It is conventionally reported that, by forming capacitors having such the configurations as described above, difficulties in employing capacitors having structure such as MIM structure or MIS (Metal Insulator Semiconductor) structure can be solved.
However, the capacitor employed in the conventional semiconductor device disclosed in the above Japanese Patent Application Laid-open No. Hei11-233726 has a problem in that, since a relative dielectric constant of the amorphous aluminum oxide film making up the capacitor insulating film 400 is as low as about 10, sufficient capacity cannot be obtained. Moreover, since a heat treatment process at high temperatures of 800° C. to 950° C. is performed after the formation of the lower electrode 200 made up of, for example, the polycrystalline silicon film in the capacitor, as described above, the active region already formed in the semiconductor substrate 100 is thermally affected during the heat treatment process.
Also, another semiconductor device having a capacitor of MIM structure using a metal oxide film such as a zirconium oxide (ZrO2) film, hafnium oxide (HfO2) film, or a like as a capacitor insulating film of its capacitor as described above is disclosed in Japanese Patent Application Laid-open No. 2002-222934. An MIM-type capacitor of the disclosed conventional semiconductor device, as shown in FIGS. 8A and 8B, includes a p-type silicon substrate 101, an N-type diffusion layer 102 formed in a specified region on the p-type silicon substrate 101, an interlayer insulating film 103 made up of a silicon oxide film formed on the p-type silicon substrate 101, a plug 104 made up of a tungsten film, a lower electrode 105 made up of a ruthenium dioxide (RuO2) film, a titanium nitride (TiN) film, a tantalum nitride (TaN) film, a tungsten nitride (WN) film, or a like formed in a manner so as to be connected to the plug 104 through a contact hole formed in part of the interlayer insulating film 103, a capacitor insulating film 108 having a first dielectric film (barrier insulating layer) 106 made up of an alumina film (aluminum oxide film) and a second dielectric film (high relative dielectric constant film) 107 made up of a metal oxide film of a zirconium oxide film, a hafnium oxide film, a tantalum pentaoxide (Ta2O5) or a like, an upper electrode 109 made up of a tungsten (W) film, a titanium nitride (TiN) film, a tantalum nitride (TaN) film, a tungsten nitride (WN) film, or a like. The alumina film making up the first dielectric film 106 serves to provide a strong adherence between the interlayer insulating film 103 and the lower electrode 105, thus enabling formation of a high-quality capacitor. The alumina film making up the first dielectric film 106 in the capacitor insulating film 108 and the metal oxide film such as the zirconium oxide film, hafnium oxide film, tantalum pentaoxide film or the like are deposited by, for example, the ALD method so as to have a desired thickness. It is thus reported that, by forming a capacitor having such configurations as above, high quality capacitor insulating film having a small dependence of a leak current on an operating temperature can be formed.
However, the capacitor employed in the conventional semiconductor device disclosed in the above Japanese Patent Application Laid-open No. 2002-222934 also has a problem in that, when a capacitor of MIM structure is formed, since the metal oxide film having a high relative dielectric constant and making up the capacitor insulating film is a crystal film, dielectric breakdown easily occurs in the capacitor insulating film due to a grain boundary existing in the crystal film when a voltage is applied to the capacitor, thus causing reduction in reliability of semiconductor devices. For example, an explanation for the above is made by using the case disclosed in the above Japanese Patent Application Laid-open No. 2002-222934 in which the zirconium oxide film is used as the capacitor insulating film. That is, as shown in FIGS. 8A and 8B, after the lower electrode 105 made up of, for example, a ruthenium dioxide (RuO2) film has been formed in a manner so as to be connected to the plug 104, if the zirconium oxide film is deposited by the ALD method subsequent to the formation of the first dielectric film 106 made up of an alumina film, since the resulting zirconium oxide film is in a state appearing immediately after the deposition and is in a polycrystalline film state, a grain boundary exists. Therefore, after the capacitor has been obtained by forming the upper electrode 109 on the capacitor insulating film 108 made up of the zirconium oxide film, when the semiconductor is operated and a voltage is applied to the capacitor, since electrical continuity through the grain boundary existing in the zirconium oxide film occurs between the lower electrode 105 and the upper electrode 109, dielectric breakdown easily occurs in the capacitor insulating film 108. As a result, since probability becomes high that an operation failure occurs in the capacitor, which causes reduction in reliability of a semiconductor device being a DRAM.